VPR Draw Structures¶
T_Draw_State¶
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struct t_draw_state¶
Structure used to store variables related to highlighting/drawing.
Stores a lot of different variables to reflect current draw state. Most callback functions/UI elements mutate some member in this struct, which then alters the draw state. Accessible through global function get_draw_state_vars() in draw_global.cpp. It is recommended to name the variable draw_state for consistent form.
Note
t_draw_state is used in the same way as a Context, but cannot be a Context because Contexts are not copyable, while t_draw_state must be. (t_draw_state is copied to save a restore of the graphics state when running graphics commands.)
Public Functions
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inline void set_graphics_blk_loc_registry_ref(const BlkLocRegistry &blk_loc_registry)¶
Set the reference to placement location variable.
During the placement stage, this reference should point to a local object in the placement stage because the placement stage does not change the global stage in place_ctx until the end of placement. After the placement is done, the reference should point to the global state stored in place_ctx.
- Parameters:
blk_loc_registry – The PlaceLocVars that the reference will point to.
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inline const BlkLocRegistry &get_graphics_blk_loc_registry_ref() const¶
Returns the reference to placement block location variables.
- Returns:
A const reference to placement block location variables.
Public Members
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pic_type pic_on_screen = NO_PICTURE¶
What to draw on the screen (ROUTING, PLACEMENT, NO_PICTURE)
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e_draw_nets show_nets = DRAW_NO_NETS¶
Whether to show nets at placement and routing.
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e_draw_crit_path show_crit_path = DRAW_NO_CRIT_PATH¶
Whether to show crit path.
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e_draw_congestion show_congestion = DRAW_NO_CONGEST¶
Controls if congestion is shown, when ROUTING is on screen.
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e_draw_routing_costs show_routing_costs¶
Controls if routing congestion costs are shown, when ROUTING is on screen.
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e_draw_block_pin_util show_blk_pin_util = DRAW_NO_BLOCK_PIN_UTIL¶
Toggles whether block pin util is shown.
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e_draw_router_expansion_cost show_router_expansion_cost = DRAW_NO_ROUTER_EXPANSION_COST¶
Toggles whether router expansion cost is shown.
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e_draw_placement_macros show_placement_macros = DRAW_NO_PLACEMENT_MACROS¶
Toggles whether placement macros are shown.
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e_draw_routing_util show_routing_util = DRAW_NO_ROUTING_UTIL¶
toggles whether routing util is shown
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e_draw_rr_toggle draw_rr_toggle = DRAW_NO_RR¶
Controls drawing of routing resources on screen, if pic_on_screen is ROUTING.
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bool clip_routing_util = false¶
Whether routing util is shown.
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bool draw_block_outlines = true¶
Boolean that toggles block outlines are shown.
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bool draw_block_text = true¶
Boolean that toggles block names.
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bool draw_partitions = false¶
Boolean that toggles showing partitions.
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int max_sub_blk_lvl = 0¶
The maximum number of sub-block levels among all physical block types in the FPGA.
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int show_blk_internal = 0¶
If 0, no internal drawing is shown. Otherwise, indicates how many levels of sub-pbs to be drawn.
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bool show_graphics = false¶
Whether graphics are enabled.
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int gr_automode = 0¶
How often is user input required. (0: each t, 1: each place, 2: never)
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bool auto_proceed = false¶
Should we automatically finish drawing (instead of waiting in the event loop for user interaction?
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e_route_type draw_route_type = GLOBAL¶
GLOBAL or DETAILED.
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vtr::vector<ClusterNetId, ezgl::color> net_color¶
color in which each net should be drawn. [0..cluster_ctx.clb_nlist.nets().size()-1]
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vtr::vector<RRNodeId, t_draw_rr_node> draw_rr_node¶
stores the state information of each routing resource.
Used to control drawing each routing resource when ROUTING is on screen. [0..device_ctx.rr_nodes.size()-1]
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const t_arch *arch_info = nullptr¶
pointer to architecture info. const
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bool save_graphics = false¶
Whether to generate an output graphics file.
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bool forced_pause = false¶
If we should pause for user interaction (requested by user)
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float pres_fac = 1.¶
Present congestion cost factor used when drawing. Is a copy of router’s current pres_fac.
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bool show_noc_button = false¶
Whether we are showing the NOC button.
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e_draw_noc draw_noc = DRAW_NO_NOC¶
Draw state for NOC drawing.
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bool justEnabled = false¶
Tracks autocomplete enabling.
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std::vector<t_draw_layer_display> draw_layer_display¶
Stores visibility and transparency drawing controls for each layer [0 … grid.num_layers -1].
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t_draw_layer_display cross_layer_display¶
Visibility and transparency for elements that cross die layers.
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inline void set_graphics_blk_loc_registry_ref(const BlkLocRegistry &blk_loc_registry)¶
T_Draw_Coords¶
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struct t_draw_coords¶
Global Struct that stores drawn coords/sizes of grid blocks/logic blocks.
Structure used to store coordinates and dimensions for grid tiles and logic blocks in the FPGA. Accessible through the global function get_draw_coords_vars().
Public Functions
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t_draw_coords()¶
constructor
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inline void set_tile_width(float new_tile_width)¶
Sets the tile width.
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float get_tile_width()¶
returns tile width
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float get_tile_height()¶
returns tile width
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ezgl::rectangle get_pb_bbox(ClusterBlockId clb_index, const t_pb_graph_node &pb_gnode)¶
returns bounding box for given pb in given clb
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ezgl::rectangle get_pb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr type, const t_pb_graph_node &pb_gnode)¶
returns bounding box of sub block at given location of given type w. given pb
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ezgl::rectangle get_pb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr type)¶
returns pb of sub block of given idx/given type at location
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ezgl::rectangle get_absolute_pb_bbox(const ClusterBlockId clb_index, const t_pb_graph_node *pb_gnode)¶
returns a bounding box for the given pb in the given clb with absolute coordinates, that can be directly drawn.
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ezgl::rectangle get_absolute_clb_bbox(const ClusterBlockId clb_index, const t_logical_block_type_ptr type)¶
Returns bounding box for CLB of given idx/type.
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ezgl::rectangle get_absolute_clb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index)¶
Returns a bounding box for the clb at device_ctx.grid[grid_x][grid_y].blocks[sub_block_index], even if it is empty.
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ezgl::rectangle get_absolute_clb_bbox(int grid_layer, int grid_x, int grid_y, int sub_block_index, const t_logical_block_type_ptr block_type)¶
Returns a bounding box for the clb at device_ctx.grid[grid_x][grid_y].blocks[sub_block_index], of given type even if it is empty.
Public Members
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float *tile_x¶
Form the axes of the chips coordinate system.
tile_x and tile_y form two axes that make a COORDINATE SYSTEM for grid_tiles, which goes from (tile_x[0],tile_y[0]) at the lower left corner of the FPGA to (tile_x[device_ctx.grid.width()-1]+tile_width, tile_y[device_ctx.grid.height()-1]+tile_width) in the upper right corner.
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float pin_size¶
Half-width or Half-height of a pin. Set when init_draw_coords is called.
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t_draw_coords()¶