VPR Constraints

Users can specify placement and/or global routing constraints on all or part of a design through a constraints file in XML format, as shown in the format below. These constraints are optional and allow detailed control of the region on the chip in which parts of the design are placed, and of the routing of global nets through dedicated (usually clock) networks.

Listing 10 The overall format of a VPR constraints file
1<vpr_constraints tool_name="vpr">
2    <partition_list>
3      <!-- Placement constraints are specified inside this tag -->
4    </partition_list>
5    <global_route_constraints>
6      <!-- Global routing constraints are specified inside this tag -->
7    </global_route_constraints>
8</vpr_constraints>

Note

Use the VPR option vpr --read_vpr_constraints to specify the VPR constraints file that is to be loaded.

The top-level tag is the <vpr_constraints> tag. This tag can contain <partition_list> and <global_route_constraints> tags. The <partition_list> tag contains information related to placement constraints, while <global_route_constraints> contains information about global routing constraints. The details for each of these constraints are given in the respective sections Placement Constraints and Global Route Constraints.